Clock and Data Recovery (CDR) circuits form a part of Serializer/Deserializer (SerDes) receivers. The CDR circuits track the phase of a sampling clock based on some criterion, such as minimizing a Mean-Squared-Error (MSE). Conventional CDR circuits are commonly designed to achieve low target bit-error-ratios (BER) on the order of 10−12 to 10−15 errors per bit. One category of CDR circuits commonly used is bang-bang CDR. Bang-bang CDR is widely used in SerDes circuits due to superior jitter tolerance and insensitivity to the Nyquist data pattern (i.e., 1010 . . . ).
Due to impairments in communication channels, previous and future symbols can have interference with a current symbol. Such interference is called inter symbol interference (ISI). From data samples obtained by sampling at the middle of a data eye, it is well understood that the ISI to the data samples needs to be reduced by means of linear or nonlinear equalization. For example, decision feedback equalization (DFE) can be used to remove the ISI at the data sample from the previous symbols. However, inter symbol interference at zero crossings was not well understood in the past. Consequently, a systematic approach to address ISI at zero crossings does not exist.
Because of the lack of a systematic approach, the ISI at the zero crossings is often not addressed properly. While the DFE feedback waveform has the intended magnitude at the data sample, the feedback waveform has only a portion of that magnitude at the zero crossing before or after the data sampling point. The feedback at the data sampling point is often related to the ISI the DFE is designed to remove. However, the feedback at the zero crossing is unrelated to the ISI at that zero crossing, causing the ISI there to be worse or better in an uncontrolled manner. The amount feedback at the zero crossing depends on the implementation and is often not easily controlled.
Clock and data recovery (CDR) using the zero crossing sample (such as Bang-bang CDR) can be affected by the residual zero-crossing ISI. The zero crossings of the equalized eye can have a wider region due to the residual zero-crossing ISI (quantified as the horizontal eye margin). When jitter is present, the data sampling can occur near the zero crossing region, leading to bit errors.
In general, maximizing both the vertical eye margin and the horizontal margin can be difficult. An equalization method that minimizes the ISI at the data samples often maximizes the vertical eye margin, while an equalization method that minimizes the ISI at the zero crossing samples leads to the best horizontal eye margin. A trade off has to be made as a result.
It would be desirable to have a method of ISI cancellation that balances minimization of ISI at the data samples with minimization of ISI at the zero crossings.